A NAND gate is an AND gate with its output inverted. It outputs low only when every input is high, and high in all other cases — three 1s and a single 0 across a two-input truth table.

Why is NAND called a universal gate?

Because every other logic gate can be built from NAND gates alone. Tying both inputs together gives NOT, two NANDs give AND, three give OR, and four give XOR. Nothing else is needed.

How do you build an XOR gate from NAND gates?

With four. Let P = A NAND B, then Q = A NAND P and R = B NAND P, and finally Y = Q NAND R. That output Y is A XOR B.

Is a NAND gate associative?

No, and this catches people out because AND and OR are. (A NAND B) NAND C is not the same as A NAND (B NAND C). For a three-input NAND, use a three-input AND and invert once at the end.

Why do real chips use NAND instead of AND?

In CMOS a NAND takes four transistors while an AND takes six — the same four plus an inverter. The inverted gate is the natural primitive, so manufacturers build from it and derive AND when they need it.

NAND gate

AND with the answer flipped — and the only gate you ever really need. A plain-English guide to logic gates from TorchAnvil.

A NAND gate is an AND with the answer inverted. It outputs low only when every input is high, and high the rest of the time. It is also, on its own, enough to build every other gate on this site.

How to read it

A	B	A · B	A NAND B
0	0	0	1
0	1	0	1
1	0	0	1
1	1	1	0

Read the AND column, flip every value, and you have NAND. Three 1s and a single 0 — the exact mirror of AND.

The written form is A · B with a bar over the whole expression. The placement of that bar matters enormously: A · B barred is NAND, while Ā · B̄ — bars over each letter separately — is something else entirely. More on that below.

Why it matters: functional completeness

NAND is functionally complete. Every Boolean function that exists can be built from NAND gates alone, with nothing else:

NOT A = A NAND A
A AND B = (A NAND B) NAND (A NAND B)
A OR B = (A NAND A) NAND (B NAND B)
A NOR B = invert the OR above, so one more NAND

Once you have NOT, AND and OR you have everything, because every truth table can be written as a sum of products.

This is not a curiosity — it's an industrial fact. A chip fabricator would much rather manufacture billions of copies of one well-characterised cell than a zoo of different ones. In CMOS, NAND is also cheaper than AND: building it takes four transistors, while AND takes those same four plus two more for the inverter on the output. The inverted gate is the primitive and the "positive" gate is the derived one, which is the opposite of how textbooks usually introduce them.

A worked example: an XOR from four NANDs

Here's functional completeness doing real work. XOR looks like it needs several kinds of gate. It doesn't:

P = A NAND B
Q = A NAND P
R = B NAND P
Y = Q NAND R

Four identical gates, and Y is A XOR B. Trace it with A=1, B=0: P = 1, Q = 0, R = 1, so Y = 0 NAND 1 = 1. Correct — exactly one input is high. Now try A=1, B=1: P = 0, Q = 1, R = 1, Y = 0. Also correct.

Build it in the simulator and check all four rows. It's the clearest demonstration you'll get that one gate type really is enough.

How it differs from NOR

Both are inverted gates and both are functionally complete, but they invert different things:

A	B	NAND	NOR
0	0	1	1
0	1	1	0
1	0	1	0
1	1	0	0

NAND is high unless everything is high. NOR is high only when everything is low. They agree on just two of the four rows.

De Morgan's laws connect them, and this is where that bar placement pays off:

NOT(A · B) = NOT A + NOT B — a NAND is an OR of inverted inputs
NOT(A + B) = NOT A · NOT B — a NOR is an AND of inverted inputs

Read aloud: "break the bar, change the operator." Pushing a NOT inside a bracket flips AND to OR and vice versa. Forget that and your algebra will be confidently wrong.

In redstone

NAND is AND plus an inverter, so the usual build is the three-torch AND followed by a fourth torch — or, more cheaply, you skip the final inversion of the AND and take the signal from one stage earlier. An AND in redstone is already NOT(NOT A OR NOT B); drop the outer NOT and you have NOT A OR NOT B, which De Morgan tells us is NAND.

That's a genuinely useful shortcut: in redstone, NAND is one torch cheaper and one tick faster than AND, for the same reason it's cheaper in silicon.

Counting the cost

Functional completeness says you can build anything from NAND. It says nothing about whether you should.

Compare the two XOR builds:

Build	Gate count	Depth
One XOR component	1	1
Four NANDs	4	3

Same truth table, four times the components and three times the delay. In silicon that's more area, more power and a slower critical path; in redstone it's more torches and more ticks.

So treat NAND-only construction as what it is — a proof that the gate set you're given is never the limiting factor. Build one XOR from NANDs to convince yourself, then use the XOR component and move on.

Gotchas

NAND is not associative. This trips people up badly, because AND and OR are. (A NAND B) NAND C is not A NAND (B NAND C). Test it: with A=0, B=0, C=0 the first gives 0 and the second gives 1. When you need a 3-input NAND, use a 3-input AND and invert once at the end — don't chain 2-input NANDs and hope.
Two NANDs don't cancel. NOT(NOT x) cancels, but a NAND has two inputs; feeding a NAND into another NAND with a fresh second input is a different function entirely.
Building everything from NAND is a great exercise and usually a poor design. The gate count balloons. Use it to understand completeness, then use the right gate for the job.

Try it

The demo on the right is two levers into a NAND into a lamp. The lamp is lit most of the time — turning it off requires both levers on, which feels backwards until the truth table sinks in.

Then build the four-NAND XOR above. It is the best hour you can spend on this site.

Frequently asked questions

What is a NAND gate?: A NAND gate is an AND gate with its output inverted. It outputs low only when every input is high, and high in all other cases — three 1s and a single 0 across a two-input truth table.
Why is NAND called a universal gate?: Because every other logic gate can be built from NAND gates alone. Tying both inputs together gives NOT, two NANDs give AND, three give OR, and four give XOR. Nothing else is needed.
How do you build an XOR gate from NAND gates?: With four. Let P = A NAND B, then Q = A NAND P and R = B NAND P, and finally Y = Q NAND R. That output Y is A XOR B.
Is a NAND gate associative?: No, and this catches people out because AND and OR are. (A NAND B) NAND C is not the same as A NAND (B NAND C). For a three-input NAND, use a three-input AND and invert once at the end.
Why do real chips use NAND instead of AND?: In CMOS a NAND takes four transistors while an AND takes six — the same four plus an inverter. The inverted gate is the natural primitive, so manufacturers build from it and derive AND when they need it.