Clocked memory

Set the data, pulse the clock, and the bit gets latched. The cell behind every CPU register. Build a D flip-flop — the bit-storage primitive of every modern computer.

What you'll learn

• Why a clock signal is the discipline that makes memory reliable.
• How a D flip-flop latches its data input only at a clock edge.
• The pattern every CPU register, RAM cell, and pipeline stage uses.

The idea

The SR latch had a problem: as long as Set or Reset are high, the cell keeps responding. That's nice for an alarm circuit but terrible for storing a value, because the input could glitch and corrupt the bit.

The fix: only let writes happen at one specific moment per cycle. That moment is the rising edge of a separate Clock signal. The flip-flop becomes a synchronous memory — between clock edges it ignores its data input completely.

The D flip-flop has two inputs:

• D (data) — the bit you want to store
• CLK (clock) — when CLK goes from 0 to 1, D gets latched into Q.

In every other moment, Q holds. Change D all you want — until the next rising clock edge, the stored value doesn't move.

The challenge

Place a Lever labeled Data, another labeled Clock, a D flip-flop, and a Lamp labeled Output. Wire:

• Data → D input
• Clock → CLK input
• D flip-flop's Q → Output lamp

The scenario walks through: setting D=1, pulsing the clock, watching the lamp lock to 1; then setting D=0, pulsing the clock again, and watching the lamp lock to 0. Notice the rows where Data changes without a clock edge — the lamp doesn't move.

Where this leads

A row of N D flip-flops sharing one clock is an N-bit register — the basic storage unit inside a CPU. Stack thousands of these and you have a register file. Wire some up to a counter and you have a program counter. The clocked-write pattern shows up everywhere from a single register to a 32 GB stick of DDR RAM (which is just an enormous array of bit cells, all latched on a clock edge).