One selector bit, two data lines, one output. The circuit every CPU uses a million times a second. Build a 2-to-1 multiplexer — digital's answer to a railway switch.
Output = (A ∧ ¬Select) ∨ (B ∧ Select).A 2-to-1 MUX is a decision gate. It has:
The rule in English: "if Select is OFF, send A through; if Select is ON, send B through". Everything else about A or B is ignored once Select has decided.
The cleanest construction uses one AND per data line, gated by Select (and its inverse), then an OR to merge:
┌────┐
Input A ──────────┤ │
│AND ├──┐
Select ──NOT─────┤ │ │
└────┘ │ ┌────┐
├─┤ OR ├── Output
│ └────┘
┌────┐ │
Input B ──────────┤ │ │
│AND ├──┘
Select ──────────┤ │
└────┘
Three inputs, eight truth-table rows. Half of them follow A, the other half follow B — exactly what the select bit is for.
Place three Levers labeled Input A, Input B, and Select. Use a NOT, two AND gates, and one OR to build the MUX. Send the OR's output to a Lamp labeled Output.
Multiplexers are how CPUs route data. When your processor picks which register to read, that's a big MUX. When the ALU selects between AND, OR, XOR, and ADD results, that's a MUX. When a memory bus reads from one of 64 cells, that's a tree of MUXes. You'll use this pattern in lesson 8 to build a tiny ALU.